Publications
Export 55 results:
"Energy Efficient Address Translation",
22nd IEEE International Symposium on High Performance Computer Architecture (HPCA '16), 03/2016.
"Energy minimization at all layers of the data center: The ParaDIME Project",
19th Conference on Design, Automation, and Test in Europe (DATE 2016), 03/2016.
"Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm",
24th International Conference on Parallel, Distributed and Network-Based Processing (PDP 2016), 02/2016.
"How much does a VM cost? Energy-proportional Accounting in VM-based Environments",
24th International Conference on Parallel, Distributed and Network-Based Processing (PDP 2016), 02/2016.
"Trigeneous Platforms for Energy Efficient Computing of HPC Applications",
22nd annual IEEE International Conference on High Performance Computing (HiPC 2015), Bengaluru, India, IEEE, 12/2015.
"VeCycle: Recycling VM Checkpoints for Faster Migrations",
Middleware: ACM, 12/2015.
Abstract
"VPM: Virtual Power Meter Tool for Low-Power Many-Core/Heterogeneous Data Center Prototypes",
33rd IEEE International Conference on Computer Design (ICCD 2015), New York, USA, IEEE, 10/2015.
"Architectural Support for Direct Message Passing on Shared Memory Multi-cores",
The 44th International Conference on Parallel Processing (ICPP-2015), 09/2015.
"FAcET: Fast and Accurate Power/Energy Estimation Tool for CPU-GPU Platforms at Architectural-Level (Nominated for the BEST PAPER AWARD)",
28th IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (IEEE-SoCC 2015), Beijing, China, IEEE, 09/2015.
"Ohua: Implicit Dataflow Programming for Concurrent Systems",
12th International Conference on Principles and Practices of Programming on the Java Platform: virtual machines, languages, and tools (PPPJ’15) , Melbourne, Florida, ACM, 09/2015.
Abstract
"NEMsCAM: A Novel CAM Cell based on Nano-Electro-Mechanical Switch and CMOS for Energy Efficient TLBs",
IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15), 07/2015.
"Dynamic Message Processing and Transactional Memory in the Actor Model",
IFIP International Conference on Distributed Applications and Interoperable Systems, DAIS, Grenoble, France, IFIP, 06/2015.
Abstract
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers",
Microprocessors and Microsystems, 06/2015.
Download: 1-s2.0-s0141933115000848-main.pdf (3.94 MB)
"Redundant Memory Mappings for Fast Access to Large Memories",
The 42nd International Symposium on Computer Architecture (ISCA-42), Portland, OR, IEEE, 06/2015.
"Heterogeneous Platform to Accelerate Compute Intensive Applications",
The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Vancouver, British Columbia, Canada, IEEE, 05/2015.
"An Energy Efficient Hybrid FPGA-GPU based Embedded Platform to Accelerate Face Recognition Application",
COOL Chips XVIII, Yokohama, Japan, IEEE Micro, 04/2015.
"Process-level Power Estimation in VM-based Systems",
EuroSYS, Bordeaux, France, ACM, 2015.
Abstract
"BitWatts: A Process-level Power Monitoring Middleware",
Middleware 2014 Poster/Demos, Bordeaux, France, ACM, 12/2014.
"Using Power Measurements as a Basis for Workload Placement in Heterogeneous Multi-Cloud Environments",
CrossCloudBrokers '14 (co-located to Middleware 2014), Bordeaux, France, ACM, 12/2014.
Abstract
Download: authorversion.pdf (262.2 KB)
"Flexicache: Highly Reliable and Low Power Cache under Supply Voltage Scaling",
CARLA Latin American High Performance Computing Conference, Valparaíso, Chile, 10/2014.
"System-Level Power & Energy Estimation Methodology and Optimization Techniques for CPU-GPU based Mobile Platforms",
In the proceedings of 12th IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESWEEK 2014), New Delhi, India, IEEE, 10/2014.
"VPPET: Virtual Platform Power and Energy Estimation Tool for Heterogeneous MPSoC based FPGA Platforms",
In the proceedings of 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2014), Palma de Mallorca, Spain, IEEE, 10/2014.
"DESSERT: DESign Space ExploRation Tool based on Power and Energy at System-Level",
In Proceedings of 27th IEEE International System-on-Chip Conference (SoCC 2014), Las Vegas, USA, 09/2014.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy",
In Proceedings of 17TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2014), Verona, IEEE/Euromicro, 08/2014.
"Sloth: SDN-enabled Activity-based Virtual Machine Deployment (Poster)",
Hot Topics in Software Defined Networking: ACM, 08/2014.
Abstract
