Publications
Export 13 results:
"Energy minimization at all layers of the data center: The ParaDIME Project",
19th Conference on Design, Automation, and Test in Europe (DATE 2016), 03/2016.
"Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm",
24th International Conference on Parallel, Distributed and Network-Based Processing (PDP 2016), 02/2016.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers",
Microprocessors and Microsystems, 06/2015.
Download: 1-s2.0-s0141933115000848-main.pdf (3.94 MB)
"Flexicache: Highly Reliable and Low Power Cache under Supply Voltage Scaling",
CARLA Latin American High Performance Computing Conference, Valparaíso, Chile, 10/2014.
"System-Level Power & Energy Estimation Methodology and Optimization Techniques for CPU-GPU based Mobile Platforms",
In the proceedings of 12th IEEE Symposium on Embedded Systems for Real-Time Multimedia (ESWEEK 2014), New Delhi, India, IEEE, 10/2014.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy",
In Proceedings of 17TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2014), Verona, IEEE/Euromicro, 08/2014.
"Exploiting a Fast and Simple ECC for Scaling Supply Voltage in Level-1 Caches",
20th IEEE International On-Line Testing Symposium, Spain, 07/2014.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy at the Architectural Level",
ICT Energy Newsletters, Barcelona, 07/2014.
"Neighbor-Cell Assisted Error Correction for MLC NAND Flash Memories",
ACM SIGMETRICS, Austin, TX, ACM, 06/2014.
"Combining Error Detection and Transactional Memory for Energy-efficient Computing below Safe Operation Margins",
Parallel, Distributed, and Network-Based Processing (PDP), Turin, Italy, IEEE, 02/2014.
Abstract
Download: presentation.ppt (2.03 MB)
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy",
Joint Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems (DMTM), In conjunction with Hipeac 2014, Vienna, Austria, 01/2014.
"Circuit Design of a Novel Adaptable and Reliable L1 Data Cache",
23rd Great Lakes Symposium on Very Large Scale Integration, Paris, France, ACM, 05/2013.
Download: glsvlsi_as_2013.pdf (616.42 KB)
"Leveraging Transactional Memory for Energy-Efficient Computing Below Safe Operation Margins",
TRANSACT 2013 - 8th ACM SIGPLAN Workshop on Transactional Computing, Houston, Texas, TRANSACT does not have archival proceedings, 03/2013.